S Ubmitted in Partial Fulfillment of the Requirements Of

In this thesis, we propose a method to model, verify, and generate IEC standard PLC code using Timed-MPSG. The objective of this research work is to reduce the development time of programmable logic controller, by automating the task of PLC code generation. Furthermore, we propose to use formal verification technique to reduce the error rate. For this purpose, we applied the TimedMPSG (Message Based Part State Graph), an extended finite state automaton, to model the sequence of operations, and model checking tool, SMV and temporal logic, to verify the specified properties of the model. Timed-MPSG is developed for generating execution module for the real-time shop floor controller system. It supervises the flow of part from one state to another state, considering the precondition of the system. The MPSG, superset of Timed-MPSG, has been used to generate non-PLC controller code, whereas, this research work generate IEC standard PLC code using Timed-MPSG. In addition, it validates the given model using formal verification technique. Even though, traditional approach like simulation, manual testing and virtual commissioning can be used to verify the PLC program, however, the integration of formal methods for verification is more desirable to validate the state model for hidden and subtle errors. In our proposed method, Timed-MPSG is used to model the formal specification of the controller system, which can be translated to textual format. Subsequently, the textual structure of Timed-MPSG can be translated to input A non-PLC execution code means excluding PLC program defined by IEC 61131-3 such as LD, FBD, SFC, ST & IL. code for model checker (SMV), because SMV takes finite state automata as an input model. Afterward, this input code combining with temporal logic is used to verify the dynamic behavior of the model. After the successful verification of Timed-MPSG model, it can be used as an input code for the PLC builder tool. Subsequently, using this tool the textual definition can be automatically translated into IEC standard PLC code using one-to-one mapping technique. Finally, the generated code can be downloaded to software or hardware PLC for the purpose of simulation or real execution. The similarity in the hierarchical and modular architecture of Timed-MPSG, SMV, and IEC standard POUs, have made it convenient to transform from one form to another form. In the subsequent chapters, an illustration of shop floor controller of an automobile industry is provided to clarify the proposed approach.